Flip Flops:
Flip flops are sequential logic circuits that can store and remember a single bit of binary information. They form the basic building blocks of memory elements in digital systems and play a crucial role in various applications, such as data storage, sequential logic operations, and synchronization.
a. SR Flip Flop (Set-Reset Flip Flop):
The SR flip
flop has two inputs: "Set" (S) and "Reset" (R). It can be in one of two stable states: Set (Q = 1) or Reset (Q = 0). The state transitions depend on the input signals applied.
When the Set input (S) is asserted (high), the output (Q) becomes set to 1, while the complementary output (Q̅) becomes 0. This state persists until the Reset input (R) is asserted.
 |
| Diagram |
When the Reset input (R) is asserted (high), the output (Q) becomes reset to 0, while the complementary output (Q̅) becomes 1. This state persists until the Set input (S) is asserted.
If both inputs are asserted simultaneously (S = R = 1), it leads to an undefined state, often referred to as a "forbidden" or "invalid" state. To avoid this ambiguity, additional logic gates can be incorporated to create edge-triggered flip flops.
Truth Table Of SR Flip Flops
|
S |
R |
U |
U’ |
|
0 |
0 |
0 |
1 |
|
0 |
1 |
0 |
1 |
|
1 |
0 |
1 |
0 |
|
1 |
1 |
∞ |
∞ |
b. D Flip Flop (Data Flip Flop):
The D flip flop has a single data input (D) and a clock input (CLK). It stores the input value (D) at the rising edge or falling edge of the clock signal, depending on the specific D flip flop design. It eliminates the possibility of having both the Set and Reset conditions present simultaneously.
When the clock signal transitions from low to high (rising edge), the input value (D) is captured and stored in the flip flop. The stored value is then reflected at the output (Q) until the next clock transition.
 |
| Diagram |
During the rest of the clock cycle, the input value can change, but it does not affect the output until the next clock transition occurs.
D flip flops are widely used in synchronous digital systems, where operations are synchronized with the clock signal.
Truth table of D Flip Flops
|
Clock |
D |
U |
U’ |
|
↓ » 0 |
0 |
0 |
1 |
|
↑ » 1 |
0 |
0 |
1 |
|
↓ » 0 |
1 |
0 |
1 |
|
↑ » 1 |
1 |
1 |
0 |
c. JK Flip Flop:
The JK flip flop is an extension of the SR flip flop and offers additional functionality. It has three inputs: J (set), K (reset), and a clock input (CLK). The JK flip flop can toggle its state when both J and K inputs are high (1), and it can also be set or reset independently.
 |
| Diagram |
When J and K are both 0, the JK flip flop holds its current state.
When J = 1 and K = 0, the output (Q) becomes set to 1.
When J = 0 and K = 1, the output (Q) becomes reset to 0.
When J and K are both 1, the output toggles its state. If the output is initially 0, it becomes 1, and vice versa.
JK flip flops are versatile and commonly used in applications that require memory storage, counting, and frequency division.
Truth table of JK Flip Flops
|
J |
K |
U |
U’ |
|
0 |
0 |
0 |
0 |
|
0 |
1 |
0 |
0 |
|
1 |
0 |
0 |
1 |
|
1 |
1 |
0 |
1 |
|
0 |
0 |
1 |
1 |
|
0 |
1 |
1 |
0 |
|
1 |
0 |
1 |
1 |
|
1 |
1 |
1 |
0 |
Registers:
Registers are a group of flip flops combined to store multiple bits of binary information simultaneously. They act as temporary storage units and are widely used in digital systems for data storage, data manipulation, and control operations.
Registers can be categorized based on their functionality:
a. Shift Registers:
Shift registers are used for shifting data in a serial manner. They consist of multiple flip flops connected in series, with data being shifted through the flip flops one bit at a time.
Serial-In, Serial-Out (SISO) Shift Register: It accepts data serially at a designated input and outputs the data in a serial manner.
Serial-In, Parallel-Out (SIPO) Shift Register: It accepts data serially but outputs the data in parallel form.
Parallel-In, Serial-Out (PISO) Shift Register: It accepts data in parallel but outputs the data in a serial manner.
Parallel-In, Parallel-Out (PIPO) Shift Register: It accepts data in parallel and outputs the data in parallel form.
Shift registers are commonly used for applications like data transmission, data delay, data storage, and shift-and-add multiplication.
b. Parallel Registers:
Parallel registers store data in parallel, meaning multiple bits are written or read simultaneously. They have multiple inputs and outputs, allowing simultaneous read and write operations.
Parallel-In, Parallel-Out (PIPO) Register: It stores data in parallel and outputs the stored data in parallel form.
Parallel-In, Serial-Out (PISO) Register: It accepts data in parallel and outputs the data serially.
Serial-In, Parallel-Out (SIPO) Register: It accepts data serially and stores the data in parallel form.
Parallel-In, Parallel-Out (PIPO) Universal Register: It combines the functionalities of shift registers and parallel registers, allowing both parallel and serial data transfer.
Parallel registers are widely used for data buffering, data synchronization, and interfacing with different parts of a digital system.
c. Universal Registers:
Universal registers combine the functionalities of shift registers and parallel registers, offering greater flexibility. They can shift data serially or store data in parallel, depending on the specific mode of operation.
Universal registers are widely used in applications that require data manipulation, data storage, and data transfer operations.
In summary, flip flops are sequential logic circuits used for storing a single bit of binary information, while registers are a collection of flip flops used to store multiple bits simultaneously. These components are essential in digital systems for data storage, manipulation, and control operations, enabling the functioning of complex digital circuits and systems.
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